1. Field of the Invention
The present invention relates to a high frequency switch device, front end unit and transceiver, and more specifically to a high frequency switch device, front end unit and transceiver, for switching an input path of RF (radio frequency) signals to an output path thereof or vice versa in transmission or reception mode of an RF trans-mitter/receiver.
2. Description of the Background Art
Recently, a single pole dual through (SPDT) switch device composed of four FETs 11, 12, 13 and 14, as shown in FIG. 10, has been widely adopted as a high frequency switch device used for a mobile communication system. In this case, a signal input/output terminal 2 is used as an antenna terminal; a signal input/output terminal 3 is used as a transmit-side terminal Tx of a transmit-side power transmission path; and a signal input/output terminal 4 is used as a receive-side terminal Rx of a receive-side small-signal transmission path, under consideration of a switch for switching an antenna of a digital cordless telephone from transmission state to reception state or vice versa.
The operation of the SPDT switch device as shown in FIG. 10 will be explained in more detail hereinbelow. When 0 V is given to a gate signal input terminal 5 and further--2.7 V is given to a gate signal input terminal 7, since the two FETs 11 and 14 are both turned on, the two FETs 12 and 13 are both turned off. Here, when a high frequency signal is inputted through the transmit-side terminal (Tx) 3, the inputted signal is outputted from the antennal signal terminal (Ant) 2 through the FET 11. In this case, a signal obtained by reducing various losses from the signal inputted through the transmit-side terminal 3 is outputted through the antenna terminal 2. Here, the various losses are an on-resistance loss of the FET 11, a leakage loss through a source-drain capacitance C.sub.off obtained when the FET 13 is turned off, and a leakage loss through a source-drain capacitance C.sub.off obtained when the off-side FET 12 is turned off.
On the other hand, although a leak current flows between the transmit-side terminal 3 (on the off-side) and the receive-side terminal 4 through the source-drain capacitance C.sub.off obtained when the FET 12 is turned off, since this leak current flows to ground through the on-state FET 14, a high isolation status can be obtained between both the transmit-side terminals 3 and the receive-side terminal 4, so that it is possible to prevent the communication system from deteriorating due to a leakage of signals from the transmit-side terminal 3 to the receive-side terminal 4.
In this SPDT switch device, however, there still exists a problem in that since the signal is passed through the source-drain capacitance C.sub.off obtained when the FET 13 is turned off, a leak current flows therethrough, with the result that an original loss of the transmission path is inevitably increased.
To overcome this problem, a parallel-resonance type switch device as shown in FIG. 8 has been proposed, which was already filed in Japanese Patent Office by the same Applicant (Japanese Published Unexamined Patent Application No. 9-23101). In this switch device, without providing the FETs 13 and 14 connected in parallel to the respective transmission path as with the case of the prior art SPDT switch device shown in FIG. 10, each of two inductors 21 and 22 is connected between the source electrode and the drain electrode of each of the FETs 11 and 12, respectively in such a way that a resonance circuit can be formed in cooperation with each of the off-state capacitances C.sub.off of both the FETs 11 and 12. In addition, a voltage supply terminal 6 for setting a reference voltage is connected to a junction point 8 of both the FETs 11 and 12 via a high resistance element 32, and further a control signal is applied to each of the gates of the FETs 11 and 12 via each of high resistance elements 31 and 33, respectively.
In the parallel resonance type switch device as shown in FIG. 8, since the inductance 21 or 22 and the off-state capacitance c.sub.off of the FET 11 or 12 construct a resonance circuit at a predetermined frequency band, respectively, it is possible to obtain a high-impedance transmission path, as far as both the FETs 11 and 12 connected in series to the transmission path are turned off. As a result, since the leak current flowing through the off-state capacitance can be reduced markedly in FIG. 10, the FETs 13 and 14 connected in parallel to the transmission path are not needed. In other words, since the FETs connected in parallel to the transmission path as with the case of the switch device as shown in FIG. 10 can be eliminated, it is possible to reduce the circuit loss and the number of circuit elements, while realizing a high isolation. In addition, in the case where the switch device is manufactured by a MMIC (Microwave Monolithic Integrated Circuit), if a dc-cutting capacitance is externally connected to the MMIC, since the same circuit construction of MMIC can be adopted in common, irrespective of the positive or negative supply voltage, it is possible to realize a general-purpose MMIC chip.
In the above-mentioned parallel resonance type switch device, however, when the resonance frequency is set to a PHS (Personal Hand-hone System) frequency, there still exists a problem in that the inductance used for the resonance circuit is relatively large. For instance, in the high frequency switch device shown in FIG. 8, when FETs each having a gate width of 1 mm are used, the off-state capacitance thereof is 0.4 pF. Therefore, when the resonance frequency is set to 1.9 GHz, the inductance value becomes as large as 21.5 nH.
FIG. 9 shows a layout pattern of the high frequency switch device shown in FIG. 8, in which a transmit-side terminal 3 of the transmit-side power transmission path is formed on the right side; and the receive-side terminal 4 of the receive-side small-signal transmission path is formed on the left side; the antenna terminal 2 is formed on the middle lower side; and the two gate signal input terminals 5 and 7 and the supply voltage terminal 6 are all formed on the middle upper side. The inductance 21 or 22 is a spiral inductor of 360 .mu.m-square, in which each line width is designed as 10 .mu.m and each space therebetween is designed as 5 .mu.m. Further, the total chip area is 0.9 mm .times.0.9 mm.
Further, in both the high frequency switch device as shown in FIG. 10 and the resonance type high frequency switch device as shown in FIG. 8, there exists such a problem that when a large signal is inputted, the inputted signal is distorted and thereby a linear output cannot be obtained. In more detail, in the case where a signal is inputted from the transmit-side terminal 3 and thereby the signal is transmitted from the antenna terminal 2 through the on-state FET 11, since the off-state FET 12 is to be turned on in ac signal standpoint, the signal waveform is deformed. As a result, noise radio waves including second and third higher harmonic spurious signals are generated, so that there exists a possibility that the system deteriorates.
In the PHS specifications decided by the RCR standard, the second higher harmonic spurious signal must be less than -45 dBc when the output power is 19 dBm. In the case of the resonance type high frequency switch device shown in FIG. 8, since the second higher harmonic spurious signal is -42 dBc, it is impossible to satisfy the RCR standard.
As described above, in the conventional resonance type high frequency switch device, when the resonance frequency is set to the L band, since an inductor of a relatively large inductance is needed, there exists a problem in that the layout area of the switch device increases. In addition, it has been necessary to secure linear output signals even when large signals are inputted.